ZXUNO expansion port (english post)

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mcleod_ideafix
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ZXUNO expansion port (english post)

Mensaje por mcleod_ideafix » 19 Nov 2019, 10:50

This comes from a post I just wrote at the ZXUNO facebook group. I decided it would be nice to have it here as well. The original question was about the pinout of the ZXUNO expansion port.

The ZXUNO expansion port is mostly undefined at this stage. That is: most of the pins have not a definitive assignment, as this depends upon which device has been plugged in the connector, which in turn defines which core you should use with it. That particular core would redefine the signals it needs to talk with that device.
That said, you must guess that each core comes with its own pinout for the expansion port. To help with that, we have come with a proposed solution, which it is yet to be implemented in the FPGA core, but the idea is this:
  • Besides power pins, there will be a pin labelled as ID. This pin carries information from a serial 1-wire EEPROM chip which will be present in every device. This EEPROM will tell the core, and hence BIOS, which device has been plugged in (and which pins it will use from the expansion connector). It has currently been mapped to pin P56.
  • The core (actually, the BIOS), will be able to interrogate this pin to find out how much and which devices are present (the 1-wire protocol allows more than one device to share the data pin)
  • If the BIOS can identify the device (that is, if the core has been designed to work with that particular device) it will program the required expansion port pins to talk with the device and the setup will be omplete.
  • If the BIOS cannot identify the device, it will keep the expansion port pins floating.
Hopefully, this will allow multiple devices to be able to work with the (Spectrum) core, and even some of them able to be used at the same time, provided that there is enough room in the FPGA to keep required hardware drivers for each device to work. Sadly, the Spartan 6 series have not their partial reconfiguration abilities documented. Otherwise, we would be able to have small sub-cores that handle each hardware device and insert or remove them into the core, the same way you would insert or remove an electronic device into a system.

Up to this date, the only assingments performed to the expansion port are those needed for the wifi module and the MIDI module (which can be used at the same time). You can check them by reading the .UCF file at the cores/exp27/zxuno_v4 directory of the repository. The relevant section of such UCF is here:

Código: Seleccionar todo

# MIDI
NET "midi_out" LOC="P43" | IOSTANDARD = LVCMOS33;
NET "clkbd" LOC="P50" | IOSTANDARD = LVCMOS33 | PULLUP;
NET "wsbd" LOC="P57" | IOSTANDARD = LVCMOS33 | PULLUP;
NET "dabd" LOC="P46" | IOSTANDARD = LVCMOS33 | PULLUP;

# UART
NET "uart_tx" LOC="P16" | IOSTANDARD = LVCMOS33;
NET "uart_rx" LOC="P12" | IOSTANDARD = LVCMOS33 | PULLUP;
NET "uart_rts" LOC="P22" | IOSTANDARD = LVCMOS33;
NET "uart_reset" LOC="P26" | IOSTANDARD = LVCMOS33 | PULLUP;
The FPGA to ZXUNO connector pin equivalence is showed in the following picture.
asignaciones_pines_fpga_expansor_zxuno.png
http://www.zxuno.com
ZX-Uno · Clon de ordenador ZX Spectrum basado en FPGA

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